Global Yield Process Integration Development Group Leader
USA - AZ - Chandler, United States
Job Description:
Join Global Yield and experience the exciting transition of Intel technology development from Oregon to Intel High Volume Manufacturing Fabs.Global Yield is part of Fab Sort Manufacturing (FSM).
FSM is responsible for the production of Intel silicon using the world's most advanced manufacturing processes in fabs in Europe and Ireland.
As a key deliverable for IDM2.0 strategy, Global Yield was formed to drive continuous process technology development within FSM; in support of yield improvement, MOR changes, and Foundry Customer optimizations.
This job is to seek BE (Backend) Process Integration Group Leader in FSM HVM Global Yield organization, reporting to the BE Process Integration Engineering Manager.
The selected candidate will build and lead a team in HVM Global Yield organization and work with other leaders in the org, fab module/yield managers and TD leaders to support yield ramp-up and process optimization in early production stage, supporting internal and external customers.
Responsibilities will include but are not limited to:
Build and lead BEOL Integration team in FSM HVM Global Yield organization to execute HVM yield roadmap, device targeting and attain performance targets.
Collaborate with BEOL Technology Development team to import new technology to production fabs across the globe.
Work with Technology Program managers, FEOL Integration, Defect Reduction and Yield Analysis teams to identify root cause of yield/performance issues and propose mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
Drive Back End process simplification to identify and implement cost reduction engineering opportunities.
Support technical interactions with internal and external customers.
Grow technical capability of the team.
Candidate should have the following behavioral skills:
Problem-solving and project management experience with self-initiative and self-learning capabilities.
Interpersonal skills to perform at leadership role including influencing, engaging, and motivating.
Track record of working across organization through matrix structures in order to accomplish strategic objectives with conflicting priorities.
Communication skills.
Global Yield does not support fully remote work model.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Master's degree in Electrical Engineering, Physics or Materials Science major. Other related science and engineering degrees can be considered based on industry experience.
- 8+ years of experience in advanced node semiconductor industry in Cu BEOL Process Integration.
- 3+ years of people leadership experience to manage and direct an organization of 8+ process integration engineers in fast-paced high-volume semiconductor manufacturing environment to drive yield, technology, quality, output and cost.
Preferred Qualifications:
- Working knowledge in module processes including lithography, dry etch, wet etch, CMP, thin films and metrology.
- Ph.D. in Electrical Engineering, Physics or Materials Science major. Other related science and engineering degrees can be considered based on industry experience.
- Experience in serving external Foundry customers through technical interactions.
- Experience in new semiconductor technology development.
- Previous related work experience in a semiconductor foundry preferred
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Job Type:
Experienced HireShift:
Shift 1 (United States of America)Primary Location:
US, Arizona, PhoenixAdditional Locations:
Business group:
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://jobs.intel.com/en/benefits
Annual Salary Range for jobs which could be performed in the US:
$179,900.00-$253,980.00Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. ApplyJob Profile
Fully remote Internship Not fully remote
Benefits/PerksBonuses Competitive pay Fully remote Remote work Retirement Stock Total compensation package Vacation
Tasks- Collaborate with technology development
- Design
- Development
- Drive process simplification
- Identify root causes of yield issues
- Lead BEOL integration team
- Management
- Project management
- Reporting
- Support customer interactions
- Test
Assembly Business CMP Communication Design Dry etch Electrical Engineering Influencing Integration Interpersonal Law Leadership Lithography Management Manufacturing processes Materials Materials science Metrology Optimization Packaging Physics Problem-solving Process Development Process integration Project Management Quality Semiconductor Semiconductor manufacturing Semiconductor technology Supply chain Thin films Wet etch Yield improvement
Experience8 years
EducationAS BE Business Communication Electrical Engineering Engineering Master Master's Master's degree Ph.D. Physics Science
TimezonesAmerica/Anchorage America/Chicago America/Denver America/Los_Angeles America/New_York Pacific/Honolulu UTC-10 UTC-5 UTC-6 UTC-7 UTC-8 UTC-9